AMD Tries to Hammer Intel

AMD Tries to Hammer Intel

AMD gave the press a sneak preview of their upcoming, 64-bit, Hammer chip. The Hammer generation represents AMD's final hope of catching up with Intel both in the desktop and server markets. Hammer also represents one of the biggest differences of opinion between the two competing chip makers. Intels' current plans do not allow any backward compatibility for their 64-bit chip, the Itanium, while AMD are promoting their version as a smooth transition option.
This transition was made apparent in AMD's presentation during which they presented Hammer-based computers running a 64-bit version of Linux as well as Microsoft Windows.

Recent rumours suggest that Intel has been so shaken-up by the reception of Hammer that plans for a hybrid 32-bit / 64-bit processor, codenamed Yamhill, are under development.

The first version of AMD's Hammer range, codenamed Clawhammer, is expected to be released in Q4, 2002.

The Press Release

AMD today demonstrated our vision of the future of computing with our next-generation processor, codenamed "Hammer."
"Great architectures are built on strong foundations, and 'Hammer' is rock solid. Based on AMD's x86-64 technology, the 'Hammer' processor will be the industry's first and only 64-bit processor for x86 computing, and is designed to offer unparalleled performance on both 32-bit and 64-bit software," said Ed Ellett, vice president of Marketing for AMD's Computation Products Group. "Beyond performance, 'Hammer' will give users a smooth migration path to the 64-bit software of tomorrow, all the while preserving the billions of dollars of today's 32-bit software applications."

"Hammer" processors are expected to be AMD's first x86 processors to have a fully integrated DDR memory controller and "Hammer" processor-based solutions are expected to be the first to incorporate a full HyperTransport technology-based chipset. Both technology advancements help remove bottlenecks and speed the flow of information through the PC. The "Hammer" processor family will also be extremely versatile, with processor versions planned to power systems from thin-and-light notebooks to 8-way enterprise servers.

AMD's demonstration featured "Hammer" running both a 64-bit Linux and 32-bit Microsoft Windows operating system. The AMD "Hammer" processors were manufactured on 0.13 micron, Silicon on Insulator (SOI) technology, which together enable higher performance and lower power consumption.

"'Hammer' remains true to AMD's traditions. We're innovating within industry standards, innovating with compatibility, and innovating with users in mind," said Fred Weber, Chief Technical Officer of the Computation Products Group of AMD. "Because it is based on the long-established x86 instruction set architecture, software developers, engineers and IT personnel don't have to start over from scratch."

AMD expects to begin shipping the first version of the "Hammer" family of processors at the end of 2002.

About "Hammer" Architecture
Industry leaders understand the need to anticipate and plan for future computing needs while meeting today's challenges. The "Hammer" processor architecture is designed to provide unparalleled performance with 32-bit applications while allowing a seamless migration path to 64-bit applications. This future family of microprocessors will also feature a high-performance integrated memory controller and a high-speed scalable system bus using HyperTransport technology.

About AMD's x86-64 Technology
AMD's straightforward approach to 64-bit computing builds upon the x86 instruction set, one of the industry's most proven and widely supported technologies. AMD's x86-64 technology is designed to support applications that address large amounts of physical and virtual memory, such as high performance servers, database management systems, and CAD tools. The x86-64 technology seamlessly integrates into the current computing and support environment, and is designed to enable enterprise to deploy high performance 64-bit capable systems.

About HyperTransport Technology
HyperTransport technology is a high-speed, high-performance, point-to-point link for integrated circuits, and is designed to meet the bandwidth needs of tomorrow's computing and communications platforms. It helps reduce the number of buses while providing a high-performance link for PCs, workstations, and servers, as well as numerous embedded applications and highly scalable multiprocessing systems. HyperTransport technology is designed to allow chips inside of PCs, networking and communications devices to communicate with each other up to 48 times faster than with some existing bus technologies.